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Use the following parameters in the Select a Component (PLD Mode) window.

Right-click the diagram and select Place Component….The next step is to describe the logic for the OR gate. You are now ready to add logic to the PLD schematic. The PLD schematic appears with all inputs on the left-hand side and all outputs on the right-hand side as shown in the figure below.Select Finish to create the PLD schematic with the inputs and outputs populated. Toggle any predefined connectors that you would like to have available in Multisim when designing the FPGA logic for this example, just leave the default selections. Note that these do not affect the physical device, and they are used only for simulation. Select the desired simulation parameters for the Default operating voltages.The PLD part number should always be XC3S500E because this is the Xilinx FPGA that is used on the DEFB. Modify the PLD design name as desired.They are the same FPGA target, but the 7-Segment version has a 7-Segment LED populated on the board as an indicator. Select Use standard configuration and ensure that Digital Electronics FPGA Board or NI Digital Electronics FPGA Board (7 Segment) is selected.

Open Multisim 12.0 and navigate to File»New»PLD Design….This configuration file is configured to automatically map Multisim signals to the appropriate pins on the FPGA. In this example, use the standard configuration for the DEFB. The first step is to create a new PLD design in Multisim. Step 1: Create a New PLD Design in Multisim Verify the version compatibility in the release notes for earlier releases of Multisim.

Note: You may use earlier versions of Multisim with earlier versions of Xilinx ISE Tools.

NI Digital Electronics FPGA Board 3.1 or later driver software.

External Link: Xilinx ISE Tools 13.x, 12.x, or 10.1 SP1.

Again, you can use a similar process to program other FPGAs. As a test design, you can implement simple OR logic using two switches and one LED on the DEFB. This article describes the step-by-step process, from DEFB creation to programming, using Multisim and Xilinx ISE Tools. NI Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) II+ and the NI Digital Electronics FPGA Board Top Multisim also includes configurations to automate creating synthesizable and implementable designs for the DEFB.įigure 1. You can use Multisim to create specialized schematics that describe the logic of a PLD, such as the FPGA on the NI Digital Electronics FPGA Board (DEFB).